October 15, 2024 ~ Throughout this blog series, we’ve taken you on a journey through the various steps involved in developing and optimizing through-silicon vias (TSVs), which have become vital to packaging of many types of devices that require smaller-footprint, higher-density package stacks. Part 1 discussed TSV formation and the benefits of our SAPS™ megasonics for TSV cleaning; Part […] Read More
Blogs and Articles
August 29, 2024 ~ ACM Research provides an advanced solution for dealing with TSV Gaps using Plasma Enhanced Chemical Vapor Deposition (PECVD) Welcome to part three of our blog series on optimizing through-silicon vias (TSVs), vertical interconnect structures vital to heterogeneous integration of multiple components for 2.5D/3D packaging techniques. Part one provided an introduction to the TSV formation process […] Read More
July 30, 2024 ~ Environmental responsibility isn’t just a tagline at ACM Research, it’s a core principle woven into the fabric of our company. We take pride in developing innovative solutions for the semiconductor industry, but we also recognize the importance of protecting the planet for future generations. During Earth Month, our Oregon team proudly collaborated with SOLVE Oregon, […] Read More
June 11, 2024 ~ Part one of this blog series on optimizing wafer-level through-silicon vias (TSV) for heterogeneous integration of multiple components and 2.5D/3D packaging provided an overview of the TSV formation process and elucidated post via cleaning solution. The SAPS™ megasonic technology developed by ACM Research enables chipmakers to remove residue following TSV formation much more effectively and completely […] Read More
May 15, 2024 ~ While heterogeneous integration of multiple components and 2.5D/3D packaging techniques pair perfectly with complex stacking architectures, these technologies elicit high demands on device manufacturing processes. Through-silicon via is the key enabler, allowing direct chip-to-chip connection through the chip stack without requiring wire bonding or edge wiring. The growing demand for miniaturized semiconductor chips and their […] Read More
February 15, 2024 ~ We enter 2024 following one of the most eventful years yet for ACM Research. This recap of our key milestones from 2023 helps illustrate why we are looking to the year ahead with great enthusiasm, as well as why we are positioned to play a leading role in the chip sector as it heads toward […] Read More
November 9, 2023 ~ The 11,000-square-foot multi-use property features offices, warehouse space and a cleanroom/demonstration lab HILLSBORO, Ore. – November 9, 2023: ACM Research, Inc. (ACM) (NASDAQ: ACMR), a leading supplier of wafer processing solutions for semiconductor and advanced wafer-level packaging (WLP) applications, today announced the grand opening of its new multi-use facility in Hillsboro, Ore., on November 28. […] Read More
September 29, 2023 ~ Megasonic cleaning with ACM’s advanced SAPS wafer cleaning technology provides an efficient, resource-optimized solution for the complex challenges associated with photoresist (PR) removal and metal lift-off (MLO) processes in semiconductor manufacturing. In this blog, we explain how the combination of ACM’s Smart Megasonix systems, MegPie transducer, and the active puddle method delivers superior removal performance with good uniformity and particle neutrality. Learn how implementing ACM’s approach successfully cuts traditional PR and MLO process times from several hours at high temperatures to minutes at lower temperatures. Read More
September 13, 2023 ~ In working to improve previous generations of megasonic wafer-cleaning systems, ACM discovered how to enhance megasonic uniformity across wafers with an innovative solution called Space Alternated Phase Shift (SAPS™) technology. SAPS technology outperforms conventional megasonic cleaning products and efficiently exceeds expectations beyond removing random defects. Learn more about how ACM’s unique SAPS cleaning systems enable more efficient manufacturing, reduce chemical consumption, enable time and cost savings, and increase wafer yields. Read More
July 25, 2023 ~ This article was originally featured in Silicon Semiconductor, Issue 3, 2023 Semiconductor chip features continue to shrink at a rapid pace. Dynamic random access memory (DRAM) manufacturers are now manufacturing 16GB chips in the 12nm range with an aspect ratio of 60:1 in the capacitor. NAND structures are reaching 232 layers with an even larger […] Read More