ACM Technical Papers
Optimization of Dummy Poly-silicon removal in high-k metal gate process
According to Moore’s law, semiconductor technology nodes have shrunk to less than 45nm in the last decades. High-K meta gate process is widely used at nodes of 28nm and below, because of low power consumption and lower leakage. In gate first high-k metal gate process, there is a need to remove dummy grid polysilicon by wet etch and stop on work function metal (WFM) or hafnium oxide (HfO2)
after source and drain ion implantation and thermal annealing processes.
High Performance, Eco-Friendly SPM Cleaning Technology using Integrated Bench-Single Wafer Cleaning System
In semiconductor manufacturing, the sulfuric peroxide mix (SPM) clean process uses a 3-1 mix of sulfuric acid and hydrogen peroxide to strip organic material and photoresist from silicon wafers. However, when implemented in batch systems, SPM cleaning fails to meet current clean specifications. Single wafer cleaning alternatives require high volumes of chemistry that are drained off, causing severe damage to the environment. To address these challenges, ACM developed its Ultra-C Tahoe as an eco-friendly option for post-implant, post-CMP and post-etch clean. The data collected demonstrates how the Ultra-C Tahoe meets 28nm requirements while saving more than 80% of SPM chemistry.
Development and Application of BEOL Polymer Residue Removal Technology
The wet chemistry post-etch clean is an essential step in dual damascene technology, in this work, two types of semi-aqueous wet clean chemicals (ST250 from ATMI and ICS8000 from Anji) are tested in ACM 300mm single clean tool. We keep addressing the ball-type defects by proposing one possible failure mechanism and presenting several solutions. The photo-assistant copper corrosion and potential chemical residue problem are also discussed.
Stripping Process Development using SAPS Megasonic Technology
In PR removal process, the method of “space alternated phase shift (SAPS)” mega sonic was applied for the assistance of PR stripping. The mega sonic power could pass through the deep hole of patterns or other complicated patterns with sustained energy, facilitating the removal of photoresist completely. Moreover, the optical microscope was carried out to examine the results of PR removal effects in different pattern wafers and AOI was used to evaluate first pass yield (FPY). Mega sonic energy with different powers and different applied reaction time was rigorously investigated the removal effects of photoresist.
Trimming Clean Using SAPS™ Megasonic Technology on Cross-Stacking 3D NAND
The Cross-stacking 3D NAND process normally combines two wafers together. Firstly, one of the wafers needs to be trimmed and cleaned before bonding. The trimming process cuts the wafer directly by mechanical forces in the region of 1-2 mm width from the wafer’s edge and 0.1-0.2 mm depth.
Damage-Free Cleaning of Advanced Structure Using Timely Energized Bubble Oscillation Megasonic Technology
The Timely Energized Bubble Oscillation (TEBO™) mode provides stable cavitation with a wide power window. It is unlike conventional megasonic which creates transit cavitation and damage when the bubble implodes. The new megasonic technology can be used to clean “sensitive” structures at 28nm and below without any pattern damage.
TSV Cleaning Using SAPS™ Megasonic Cleaning Technology
SAPS™ megasonic technology incorporated with dilute solution has a high cleaning efficiency for fluoropolymer sidewall residue removal in post-silicon etch TSV cleaning, with minimal damage to the structures and low material loss.
Removal of Fine Particles Using SAPS™ Technology and Functional Water
SAPS™ megasonic technology coupled with functional water has a significant capability for fine particle removal in wafer cleaning, and the mechanism for this functioning is explained by radical generation.
Highly Uniform Cu Film Deposition by Electrochemical Methods
A deposited Cu film that has within-film nonuniformity (WFNU) exceeding 2.5% fails to meet the requirement for subsequent CMP process. WFNU less than 1.0% was achieved for 3000Å Cu film deposited on 350Å Cu seed through optimization of chamber design and the deposition process.
Optimization of Film Uniformity by Electrochemical Copper Deposition Chamber Design
The impact of chamber design parameters on the non-uniformity of Cu film deposited by electrochemical method were investigated quantitatively by simulating the film growth process. Further studies were conducted to optimize basic process parameters.
Contact Us
Looking for customized solutions for your wet wafer processing, ECP, Furnace, Track and SFP?